This invention relates generally to digital data transmission systems and more particularly to such systems wherein a transmission line is used to interconnect a plurality of modular subsystems, each one thereof having an associated input/output device arranged in what is commonly called a "party-line" organized system.
As is known in the art, digital data transmission systems sometimes include a plurality of modular subsystems, interconnected by a transmission line, which transfer binary data from one such subsystem to a selected number of other ones therof.
Each one of such modular subsystems generally includes an input/output device incorporating a transmit section and a receive section. The transmit section is connected to the transmission line through a driver circuit which generally includes an output transistor interposed between such transmission line and a voltage source. Such a transistor is responsive to binary control signals for coupling or decoupling the voltage source and transmission line in accordance with the binary control signals. The driver circuit is connected to the transmission line in what is commonly called a "wired-OR" arrangement, that is, a binary "1" (or "high" voltage) produced at the output of any one of the driver circuits will apply a binary "1" signal on the transmission line. Thus, if a short circuit occurs to the output transistor in any one of the driver circuits an erroneous signal (i.e., a "1") is applied to the transmission line. For proper operation of the digital data transmission system as a whole, it is necessary to remove any faulty driver circuit from the transmission line.
Because of the amount of current flow in each driver circuit conventional logic gates cannot be interposed between the output transistor and the transmission line to disable any faulty driver circuit. It has been necessary, therefore, sequentially to manually disconnect each one of the modular subsystems to identify any faulty driver circuit. Such procedure is obviously costly and time consuming on the system.
The driver circuit used in the input/output device of the type described above generally includes protective means operative if a short circuit occurs in the transmission line because such short circuit ordinarily results in excessive, and damaging, current flow through the output transistor of such driver circuit. One known protective means limits the amount of current flow through the output transistor of a driver circuit. Such means include a transistor network disposed between the voltage supply and such output transistor. The use of such a transistor network however, reduces the overall switching response time of the driver circuit, with the concomitant disadvantage of reducing the speed of the digital data transmission system.
An additional problem with digital data transmission systems of the type described above is that of "noise immunity." That is, because the receive sections of the input/output devices are generally connected to the transmission line through relatively low impedance logic gates, such receive sections draw current, even when not selected, thereby causing a relatively large voltage to be developed across the transmission line when a binary "0" (or low voltage) is transmitted thereon. Such relatively large voltage, together with any noise which may be coupled into such transmission line, thereby produces a signal on such transmission line which may appear as a binary "1" instead of a binary "0" to the receive section of a selected input/output device. Therefore, noise immunity protection is generally required to eliminate ambiguity in the binary signal developed across the transmission line. Known "noise immunity" protection techniques generally include the use of a network between the transmission line and each one of the receive sections. Such a network requires a voltage source of opposite polarity from that which is used with the driver circuit. The network and additional voltage source add to the cost of the digital data transmission system.